Modeling and Design of STT-MRAMs
by Richard Dorrance
Abstract:
Spin-Torque Transfer Magnetoresistive Random Access Memory (STT-MRAM) is an emerging memory technology with the potential to become a true universal memory: the density of DRAM, the speed of SRAM, and the non-volatility of Flash. STT-MRAM uses a Magnetic Tunnel Junction (MTJ) device as a non-volatile magnetic memory storage element and the recently discovered spin-torque phenomenon to switch magnetic states. In this work, the fundamental quantum mechanical nature of the MTJ is explored to develop a highly accurate physics-based model of its spintronic operation. Innovative design-space analysis techniques are introduced to investigate existing and proposed STT-MRAM architectures. Three test chips were fabricated using these new design methodologies at 90nm, 65nm, and 45nm technology nodes. Each chip has a memory density more than two times greater and a read/write performance more than 10 times greater when compared to published state-of-the-art STT-MRAMs. Theoretical and observed scaling trends show Fash-like densities, with SRAM-equivalent access times, while using 10 times less energy in more advanced technology nodes (below 32nm).
Reference:
R. Dorrance, "Modeling and Design of STT-MRAMs," Master's thesis, University of California, Los Angeles, June 2011.
Bibtex Entry:
@MASTERSTHESIS{Dorrance2011:MSTHESIS,
    author    = {Dorrance, Richard},
    title     = {{Modeling and Design of STT-MRAMs}},
    school    = {University of California, Los Angeles},
    year      = {2011},
    month     = {June},
    abstract  = {Spin-Torque Transfer Magnetoresistive Random Access Memory (STT-MRAM) is an emerging memory technology with the potential to become a true universal memory: the density of DRAM, the speed of SRAM, and the non-volatility of Flash. STT-MRAM uses a Magnetic Tunnel Junction (MTJ) device as a non-volatile magnetic memory storage element and the recently discovered spin-torque phenomenon to switch magnetic states. In this work, the fundamental quantum mechanical nature of the MTJ is explored to develop a highly accurate physics-based model of its spintronic operation. Innovative design-space analysis techniques are introduced to investigate existing and proposed STT-MRAM architectures. Three test chips were fabricated using these new design methodologies at 90nm, 65nm, and 45nm technology nodes. Each chip has a memory density more than two times greater and a read/write performance more than 10 times greater when compared to published state-of-the-art STT-MRAMs. Theoretical and observed scaling trends show Fash-like densities, with SRAM-equivalent access times, while using 10 times less energy in more advanced technology nodes (below 32nm).},
    url       = {http://rdorrance.bol.ucla.edu/pdf/Modeling%20and%20Design%20of%20STT-MRAMs.pdf}
}
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