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Master's Theses

[MS1] R. Dorrance, "Modeling and Design of STT-MRAMs," Master's thesis, University of California, Los Angeles, June 2011. [bibtex] [pdf]

Journal Papers

[J5] R. Dorrance and D. Marković, "Scalable Sparse Linear Algebra Kernel for Accelerating Bioinformatics on FPGAs," IEEE/ACM Transactions on Computational Biology and Bioinformatics (CBB), 2015. (under review) [bibtex]
[J4] H. Lee, R. Dorrance, S. Basir-Kazeruni, D. Marković, P. K. Amiri, K. L. Wang, "A Spin-based Artificial Neuron for Ultra-Scale Neuromorphic Computing," IEEE Transactions on Nanotechnology (TNANO), 2015. (under review) [bibtex]
[J3] H. Lee, J. G. Alzate, R. Dorrance, D. Marković, P. K. Amiri, K. L. Wang, "Design of a Fast and Low-Power Sense Amplifier and Writing Circuit for High-Speed MRAM," IEEE Transactions on Magnetics (TMAG), vol. PP, pp. 1-1, 2014. [bibtex] [pdf] [doi]
[J2] R. Dorrance, J. G. Alzate, S. S. Cherepov, P. Upadhyaya, I. Krivorotov, J. A. Katine, J. Langer, K. L. Wang, P. K. Amiri, D. Marković, "Diode-MTJ Crossbar Memory Cell Using Voltage-Induced Unipolar Switching for High-Density MRAM," IEEE Electron Device Letters (EDL), vol. 34, no. 6, pp. 753-755, June 2013. [bibtex] [pdf] [doi]
[J1] R. Dorrance, F. Ren, Y. Toriyama, A. A. Hafez, C. K. Yang, D. Marković, "Scalability and Design-Space Analysis of a 1T-1MTJ Memory Cell for STT-RAMs," IEEE Transactions on Electron Devices (TED), vol. 59, no. 4, pp. 878-887, April 2012. [bibtex] [pdf] [doi]

Conference Papers

[C7] R. Dorrance, F. Ren, and D. Marković, "A Scalable Sparse Matrix-Vector Multiplication (SpMxV) Kernel For Sparse-BLAS on FPGAs," in Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA'14), pp. 161-170, February 2014. [bibtex] [pdf] [doi]
[C6] F. Ren, R. Dorrance, W. Xu, D. Marković, "A Single-Precision Compressive Sensing Signal Reconstruction Engine on FPGAs," in 2013 23rd International Conference on Field Programmable Logic and Applications (FPL'13), pp. 1-4, September 2013. [bibtex] [pdf] [doi]
[C5] R. Dorrance, J. G. Alzate, S. S. Cherepov, P. Upadhyaya, K. L. Wang, P. K. Amiri, D. Marković, "Voltage-controlled MRAM for 3D Stackable Non-Volatile Memories," in Proceedings of the International Solid-State Circuits Conference Student Research Preview (ISSCC'13), February 2013. [bibtex] [pdf] [doi]
[C4] J. G. Alzate, P. K. Amiri, P. Upadhyaya, S. S. Cherepov, J. Zhu, M. Lewis, R. Dorrance, J. A. Katine, J. Langer, K. Galatsis, D. Marković, I. Krivorotov, K. L. Wang, "Voltage-Induced Switching of Nanoscale Magnetic Tunnel Junctions," in Proceedings of the International Electron Devices Meeting (IEDM'12), pp. 29.5.1-29.5.4, December 2012. [bibtex] [pdf] [doi]
[C3] F. Ren, H. Park, R. Dorrance, Y. Toriyama, C. K. Yang, D. Marković, "A Body-Voltage-Sensing-Based Short Pulse Reading Circuit for Spin-Torque Transfer RAMs (STT-RAMs)," in Proceedings of 13th International Symposium on Quality Electronic Design (ISQED'12), pp. 275-282, March 2012. [bibtex] [pdf] [doi]
[C2] R. Dorrance, F. Ren, Y. Toriyama, A. A. Hafez, C. K. Yang, D. Marković, "Scalability and Design-Space Analysis of a 1T-1MTJ Memory Cell," in Proceedings of the ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH'11), pp. 32-36, June 2011. [bibtex] [pdf] [doi]
[C1] H. Park, R. Dorrance, A. A. Hafez, F. Ren, D. Marković, C. K. Yang, "Analysis of STT-RAM Cell Design with Multiple MJTs Per Access," in Proceedings of the ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH'11), pp. 53-58, June 2011. [bibtex] [pdf] [doi]

Patents

[P3] P. K. Amiri, R. Dorrance, H. Lee, S. Basir-Kazeruni, D. Marković, K. L. Wang, "An Artificial Neuron based on the Spin Hall Effect," US Patent, University of California Case No. 2014-???-1, November 2014. [bibtex]
[P2] P. K. Amiri, R. Dorrance, D. Marković, K. L. Wang, "Read-Disturbance-Free Nonvolatile Content Addressable Memory (CAM)," US Patent, US 20140071728 A1, March 2014. (Licensed to a startup MRAM company based in California) [bibtex] [pdf] [google patents]
[P1] P. K. Amiri, R. Dorrance, D. Marković, K. L. Wang, "Nonvolatile Magneto-Electric Random Access Memory Circuit with Burst Writing and Back-to-Back Reads," US Patent, US 20140071732 A1, March 2014. (Licensed to a startup MRAM company based in California) [bibtex] [pdf] [google patents]

Last updated: January 29, 2015



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